1. Field of the Invention
Embodiments of the invention generally relate to a method and apparatus for chemical vapor deposition.
2. Background of the Related Art
Integrated circuits have evolved into complex devices that can include millions of components (e.g., transistor, capacitors and resistors) on a single chip. The evolution of chip design continually requires faster circuitry and greater circuit densities. Demands for greater circuit densities necessitates a reduction in the dimensions of the integrated circuit components.
As the dimensions of integrated circuit components are reduced, materials used to fabricate such components must be carefully selected in order to maximize the electrical performance of the circuit. For example, low resistivity metal interconnects (e.g., aluminum and copper) are typically used to provide conductive pathways between components of the integrated circuit. Typically, the metal interconnects are electrically isolated from each other by a bulk insulating material. When the distance between adjacent metal interconnects and/or the thickness of the bulk insulating material has sub-micron dimensions, capacitive coupling may potentially occur between such interconnects. Capacitive coupling between adjacent metal connectors interconnects causes cross-talk and/or resistance-capacitance (RC) delay, which degrades the overall performance of the integrated circuit.
The RC delay associated with interconnects is rapidly becoming the limiting factor in utilizing high-speed integrated circuits with design rules below 0.15 micron. The adoption of copper as a conductor of choice can improve the resistance component by almost a factor of two over that of aluminum. However, a reduction in the dielectric constant of the inter-metal dielectric material over that of silicon dioxide (k≅4.1) is also desirable to improve the capacitive component for future high-speed circuitry.
Two types of dielectric materials having low dielectric constants (k<3, also known as low-k materials) have been developed based on organosilane by method of plasma-enhanced chemical vapor deposition (PECVD). One material is a silicon carbide film typically utilized as an interlayer dielectric material and is available under the trade name BLACK DIAMOND™ film available from Applied Materials, Inc., located in Santa Clara, Calif. A second layer has been developed as a low-k barrier/etch stop silicon nitride film, available under the trade name BLOk™ film, also available from Applied Materials, Inc. However, these films cannot currently be deposited in a single chamber using a common process kit, which causes extra investment costs for the processor and reduces the flexibility of the processing system. The process kit generally includes a showerhead for distribution gases within the chamber and a purge ring, among other components.
Attempting deposition of one film using the process kit of the other has demonstrated poor deposition uniformity and unsatisfactorily high dielectric constants. As a result, separate processing chambers must be utilized for deposition of each type of dielectric film, limiting the flexibility of fabrication lines and increasing cost of tool ownership, or necessitating costly processing chamber downtime to allow replacement of one process kit for the other. Moreover, as separate chambers are required for deposition of each type of film, substrate throughput and process flexibility remains limited.
Therefore, is a need for a method and apparatus for chemical vapor deposition of various low-k dielectric materials utilizing a common process kit.